
decimal-digits:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400500 <_init>:
  400500:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400504:	910003fd 	mov	x29, sp
  400508:	94000038 	bl	4005e8 <call_weak_fn>
  40050c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400510:	d65f03c0 	ret

Disassembly of section .plt:

0000000000400520 <.plt>:
  400520:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  400524:	90000090 	adrp	x16, 410000 <__FRAME_END__+0xf330>
  400528:	f947fe11 	ldr	x17, [x16, #4088]
  40052c:	913fe210 	add	x16, x16, #0xff8
  400530:	d61f0220 	br	x17
  400534:	d503201f 	nop
  400538:	d503201f 	nop
  40053c:	d503201f 	nop

0000000000400540 <__libc_start_main@plt>:
  400540:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  400544:	f9400211 	ldr	x17, [x16]
  400548:	91000210 	add	x16, x16, #0x0
  40054c:	d61f0220 	br	x17

0000000000400550 <atof@plt>:
  400550:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  400554:	f9400611 	ldr	x17, [x16, #8]
  400558:	91002210 	add	x16, x16, #0x8
  40055c:	d61f0220 	br	x17

0000000000400560 <__gmon_start__@plt>:
  400560:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  400564:	f9400a11 	ldr	x17, [x16, #16]
  400568:	91004210 	add	x16, x16, #0x10
  40056c:	d61f0220 	br	x17

0000000000400570 <abort@plt>:
  400570:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  400574:	f9400e11 	ldr	x17, [x16, #24]
  400578:	91006210 	add	x16, x16, #0x18
  40057c:	d61f0220 	br	x17

0000000000400580 <__isoc99_sscanf@plt>:
  400580:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  400584:	f9401211 	ldr	x17, [x16, #32]
  400588:	91008210 	add	x16, x16, #0x20
  40058c:	d61f0220 	br	x17

0000000000400590 <printf@plt>:
  400590:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  400594:	f9401611 	ldr	x17, [x16, #40]
  400598:	9100a210 	add	x16, x16, #0x28
  40059c:	d61f0220 	br	x17

Disassembly of section .text:

00000000004005a0 <_start>:
  4005a0:	d280001d 	mov	x29, #0x0                   	// #0
  4005a4:	d280001e 	mov	x30, #0x0                   	// #0
  4005a8:	aa0003e5 	mov	x5, x0
  4005ac:	f94003e1 	ldr	x1, [sp]
  4005b0:	910023e2 	add	x2, sp, #0x8
  4005b4:	910003e6 	mov	x6, sp
  4005b8:	580000c0 	ldr	x0, 4005d0 <_start+0x30>
  4005bc:	580000e3 	ldr	x3, 4005d8 <_start+0x38>
  4005c0:	58000104 	ldr	x4, 4005e0 <_start+0x40>
  4005c4:	97ffffdf 	bl	400540 <__libc_start_main@plt>
  4005c8:	97ffffea 	bl	400570 <abort@plt>
  4005cc:	00000000 	.inst	0x00000000 ; undefined
  4005d0:	0040069c 	.word	0x0040069c
  4005d4:	00000000 	.word	0x00000000
  4005d8:	00400a48 	.word	0x00400a48
  4005dc:	00000000 	.word	0x00000000
  4005e0:	00400ac8 	.word	0x00400ac8
  4005e4:	00000000 	.word	0x00000000

00000000004005e8 <call_weak_fn>:
  4005e8:	90000080 	adrp	x0, 410000 <__FRAME_END__+0xf330>
  4005ec:	f947f000 	ldr	x0, [x0, #4064]
  4005f0:	b4000040 	cbz	x0, 4005f8 <call_weak_fn+0x10>
  4005f4:	17ffffdb 	b	400560 <__gmon_start__@plt>
  4005f8:	d65f03c0 	ret
  4005fc:	00000000 	.inst	0x00000000 ; undefined

0000000000400600 <deregister_tm_clones>:
  400600:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400604:	91010000 	add	x0, x0, #0x40
  400608:	b0000081 	adrp	x1, 411000 <__libc_start_main@GLIBC_2.17>
  40060c:	91010021 	add	x1, x1, #0x40
  400610:	eb00003f 	cmp	x1, x0
  400614:	540000a0 	b.eq	400628 <deregister_tm_clones+0x28>  // b.none
  400618:	90000001 	adrp	x1, 400000 <_init-0x500>
  40061c:	f9457421 	ldr	x1, [x1, #2792]
  400620:	b4000041 	cbz	x1, 400628 <deregister_tm_clones+0x28>
  400624:	d61f0020 	br	x1
  400628:	d65f03c0 	ret
  40062c:	d503201f 	nop

0000000000400630 <register_tm_clones>:
  400630:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400634:	91010000 	add	x0, x0, #0x40
  400638:	b0000081 	adrp	x1, 411000 <__libc_start_main@GLIBC_2.17>
  40063c:	91010021 	add	x1, x1, #0x40
  400640:	cb000021 	sub	x1, x1, x0
  400644:	9343fc21 	asr	x1, x1, #3
  400648:	8b41fc21 	add	x1, x1, x1, lsr #63
  40064c:	9341fc21 	asr	x1, x1, #1
  400650:	b40000a1 	cbz	x1, 400664 <register_tm_clones+0x34>
  400654:	90000002 	adrp	x2, 400000 <_init-0x500>
  400658:	f9457842 	ldr	x2, [x2, #2800]
  40065c:	b4000042 	cbz	x2, 400664 <register_tm_clones+0x34>
  400660:	d61f0040 	br	x2
  400664:	d65f03c0 	ret

0000000000400668 <__do_global_dtors_aux>:
  400668:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40066c:	910003fd 	mov	x29, sp
  400670:	f9000bf3 	str	x19, [sp, #16]
  400674:	b0000093 	adrp	x19, 411000 <__libc_start_main@GLIBC_2.17>
  400678:	39410260 	ldrb	w0, [x19, #64]
  40067c:	35000080 	cbnz	w0, 40068c <__do_global_dtors_aux+0x24>
  400680:	97ffffe0 	bl	400600 <deregister_tm_clones>
  400684:	52800020 	mov	w0, #0x1                   	// #1
  400688:	39010260 	strb	w0, [x19, #64]
  40068c:	f9400bf3 	ldr	x19, [sp, #16]
  400690:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400694:	d65f03c0 	ret

0000000000400698 <frame_dummy>:
  400698:	17ffffe6 	b	400630 <register_tm_clones>

000000000040069c <main>:
  40069c:	a9b57bfd 	stp	x29, x30, [sp, #-176]!
  4006a0:	910003fd 	mov	x29, sp
  4006a4:	90000000 	adrp	x0, 400000 <_init-0x500>
  4006a8:	91332000 	add	x0, x0, #0xcc8
  4006ac:	fd400000 	ldr	d0, [x0]
  4006b0:	fd0057a0 	str	d0, [x29, #168]
  4006b4:	90000000 	adrp	x0, 400000 <_init-0x500>
  4006b8:	91318001 	add	x1, x0, #0xc60
  4006bc:	910143a0 	add	x0, x29, #0x50
  4006c0:	a9400c22 	ldp	x2, x3, [x1]
  4006c4:	a9000c02 	stp	x2, x3, [x0]
  4006c8:	a9410c22 	ldp	x2, x3, [x1, #16]
  4006cc:	a9010c02 	stp	x2, x3, [x0, #16]
  4006d0:	a9420c22 	ldp	x2, x3, [x1, #32]
  4006d4:	a9020c02 	stp	x2, x3, [x0, #32]
  4006d8:	a9430c22 	ldp	x2, x3, [x1, #48]
  4006dc:	a9030c02 	stp	x2, x3, [x0, #48]
  4006e0:	a9440c22 	ldp	x2, x3, [x1, #64]
  4006e4:	a9040c02 	stp	x2, x3, [x0, #64]
  4006e8:	91013c21 	add	x1, x1, #0x4f
  4006ec:	91013c00 	add	x0, x0, #0x4f
  4006f0:	b9400021 	ldr	w1, [x1]
  4006f4:	b9000001 	str	w1, [x0]
  4006f8:	f90027bf 	str	xzr, [x29, #72]
  4006fc:	f90023bf 	str	xzr, [x29, #64]
  400700:	f9001fbf 	str	xzr, [x29, #56]
  400704:	f9001bbf 	str	xzr, [x29, #48]
  400708:	f90017bf 	str	xzr, [x29, #40]
  40070c:	90000000 	adrp	x0, 400000 <_init-0x500>
  400710:	9132e000 	add	x0, x0, #0xcb8
  400714:	79400000 	ldrh	w0, [x0]
  400718:	790033a0 	strh	w0, [x29, #24]
  40071c:	f801a3bf 	stur	xzr, [x29, #26]
  400720:	790047bf 	strh	wzr, [x29, #34]
  400724:	90000000 	adrp	x0, 400000 <_init-0x500>
  400728:	912be000 	add	x0, x0, #0xaf8
  40072c:	fd4057a0 	ldr	d0, [x29, #168]
  400730:	97ffff98 	bl	400590 <printf@plt>
  400734:	90000000 	adrp	x0, 400000 <_init-0x500>
  400738:	912c0000 	add	x0, x0, #0xb00
  40073c:	fd4057a0 	ldr	d0, [x29, #168]
  400740:	97ffff94 	bl	400590 <printf@plt>
  400744:	90000000 	adrp	x0, 400000 <_init-0x500>
  400748:	912c2000 	add	x0, x0, #0xb08
  40074c:	fd4057a0 	ldr	d0, [x29, #168]
  400750:	97ffff90 	bl	400590 <printf@plt>
  400754:	90000000 	adrp	x0, 400000 <_init-0x500>
  400758:	912c4000 	add	x0, x0, #0xb10
  40075c:	fd4057a0 	ldr	d0, [x29, #168]
  400760:	97ffff8c 	bl	400590 <printf@plt>
  400764:	910063a7 	add	x7, x29, #0x18
  400768:	9100a3a6 	add	x6, x29, #0x28
  40076c:	9100c3a5 	add	x5, x29, #0x30
  400770:	9100e3a4 	add	x4, x29, #0x38
  400774:	910103a3 	add	x3, x29, #0x40
  400778:	910123a2 	add	x2, x29, #0x48
  40077c:	90000000 	adrp	x0, 400000 <_init-0x500>
  400780:	912c6001 	add	x1, x0, #0xb18
  400784:	910143a0 	add	x0, x29, #0x50
  400788:	97ffff7e 	bl	400580 <__isoc99_sscanf@plt>
  40078c:	fd4027a0 	ldr	d0, [x29, #72]
  400790:	fd4023a1 	ldr	d1, [x29, #64]
  400794:	fd401fa2 	ldr	d2, [x29, #56]
  400798:	fd401ba3 	ldr	d3, [x29, #48]
  40079c:	fd4017a4 	ldr	d4, [x29, #40]
  4007a0:	910063a1 	add	x1, x29, #0x18
  4007a4:	90000000 	adrp	x0, 400000 <_init-0x500>
  4007a8:	912cc000 	add	x0, x0, #0xb30
  4007ac:	97ffff79 	bl	400590 <printf@plt>
  4007b0:	910063a7 	add	x7, x29, #0x18
  4007b4:	9100a3a6 	add	x6, x29, #0x28
  4007b8:	9100c3a5 	add	x5, x29, #0x30
  4007bc:	9100e3a4 	add	x4, x29, #0x38
  4007c0:	910103a3 	add	x3, x29, #0x40
  4007c4:	910123a2 	add	x2, x29, #0x48
  4007c8:	90000000 	adrp	x0, 400000 <_init-0x500>
  4007cc:	912c6001 	add	x1, x0, #0xb18
  4007d0:	910143a0 	add	x0, x29, #0x50
  4007d4:	97ffff6b 	bl	400580 <__isoc99_sscanf@plt>
  4007d8:	fd4027a0 	ldr	d0, [x29, #72]
  4007dc:	fd4023a1 	ldr	d1, [x29, #64]
  4007e0:	fd401fa2 	ldr	d2, [x29, #56]
  4007e4:	fd401ba3 	ldr	d3, [x29, #48]
  4007e8:	fd4017a4 	ldr	d4, [x29, #40]
  4007ec:	910063a1 	add	x1, x29, #0x18
  4007f0:	90000000 	adrp	x0, 400000 <_init-0x500>
  4007f4:	912d4000 	add	x0, x0, #0xb50
  4007f8:	97ffff66 	bl	400590 <printf@plt>
  4007fc:	90000000 	adrp	x0, 400000 <_init-0x500>
  400800:	912de000 	add	x0, x0, #0xb78
  400804:	97ffff53 	bl	400550 <atof@plt>
  400808:	90000000 	adrp	x0, 400000 <_init-0x500>
  40080c:	912e2000 	add	x0, x0, #0xb88
  400810:	97ffff60 	bl	400590 <printf@plt>
  400814:	90000000 	adrp	x0, 400000 <_init-0x500>
  400818:	912e6000 	add	x0, x0, #0xb98
  40081c:	97ffff4d 	bl	400550 <atof@plt>
  400820:	90000000 	adrp	x0, 400000 <_init-0x500>
  400824:	912e2000 	add	x0, x0, #0xb88
  400828:	97ffff5a 	bl	400590 <printf@plt>
  40082c:	90000000 	adrp	x0, 400000 <_init-0x500>
  400830:	912ea000 	add	x0, x0, #0xba8
  400834:	97ffff47 	bl	400550 <atof@plt>
  400838:	90000000 	adrp	x0, 400000 <_init-0x500>
  40083c:	912e2000 	add	x0, x0, #0xb88
  400840:	97ffff54 	bl	400590 <printf@plt>
  400844:	90000000 	adrp	x0, 400000 <_init-0x500>
  400848:	912ee000 	add	x0, x0, #0xbb8
  40084c:	97ffff41 	bl	400550 <atof@plt>
  400850:	90000000 	adrp	x0, 400000 <_init-0x500>
  400854:	912e2000 	add	x0, x0, #0xb88
  400858:	97ffff4e 	bl	400590 <printf@plt>
  40085c:	90000000 	adrp	x0, 400000 <_init-0x500>
  400860:	912f2000 	add	x0, x0, #0xbc8
  400864:	97ffff3b 	bl	400550 <atof@plt>
  400868:	90000000 	adrp	x0, 400000 <_init-0x500>
  40086c:	912e2000 	add	x0, x0, #0xb88
  400870:	97ffff48 	bl	400590 <printf@plt>
  400874:	90000000 	adrp	x0, 400000 <_init-0x500>
  400878:	912f6000 	add	x0, x0, #0xbd8
  40087c:	97ffff35 	bl	400550 <atof@plt>
  400880:	90000000 	adrp	x0, 400000 <_init-0x500>
  400884:	912e2000 	add	x0, x0, #0xb88
  400888:	97ffff42 	bl	400590 <printf@plt>
  40088c:	90000000 	adrp	x0, 400000 <_init-0x500>
  400890:	912fa000 	add	x0, x0, #0xbe8
  400894:	97ffff2f 	bl	400550 <atof@plt>
  400898:	90000000 	adrp	x0, 400000 <_init-0x500>
  40089c:	912e2000 	add	x0, x0, #0xb88
  4008a0:	97ffff3c 	bl	400590 <printf@plt>
  4008a4:	90000000 	adrp	x0, 400000 <_init-0x500>
  4008a8:	912fe000 	add	x0, x0, #0xbf8
  4008ac:	97ffff29 	bl	400550 <atof@plt>
  4008b0:	90000000 	adrp	x0, 400000 <_init-0x500>
  4008b4:	912e2000 	add	x0, x0, #0xb88
  4008b8:	97ffff36 	bl	400590 <printf@plt>
  4008bc:	90000000 	adrp	x0, 400000 <_init-0x500>
  4008c0:	91302000 	add	x0, x0, #0xc08
  4008c4:	97ffff23 	bl	400550 <atof@plt>
  4008c8:	90000000 	adrp	x0, 400000 <_init-0x500>
  4008cc:	912e2000 	add	x0, x0, #0xb88
  4008d0:	97ffff30 	bl	400590 <printf@plt>
  4008d4:	90000000 	adrp	x0, 400000 <_init-0x500>
  4008d8:	91306000 	add	x0, x0, #0xc18
  4008dc:	97ffff1d 	bl	400550 <atof@plt>
  4008e0:	90000000 	adrp	x0, 400000 <_init-0x500>
  4008e4:	912e2000 	add	x0, x0, #0xb88
  4008e8:	97ffff2a 	bl	400590 <printf@plt>
  4008ec:	90000000 	adrp	x0, 400000 <_init-0x500>
  4008f0:	9130a000 	add	x0, x0, #0xc28
  4008f4:	97ffff17 	bl	400550 <atof@plt>
  4008f8:	90000000 	adrp	x0, 400000 <_init-0x500>
  4008fc:	912e2000 	add	x0, x0, #0xb88
  400900:	97ffff24 	bl	400590 <printf@plt>
  400904:	90000000 	adrp	x0, 400000 <_init-0x500>
  400908:	9130e000 	add	x0, x0, #0xc38
  40090c:	97ffff11 	bl	400550 <atof@plt>
  400910:	90000000 	adrp	x0, 400000 <_init-0x500>
  400914:	912e2000 	add	x0, x0, #0xb88
  400918:	97ffff1e 	bl	400590 <printf@plt>
  40091c:	90000000 	adrp	x0, 400000 <_init-0x500>
  400920:	912de000 	add	x0, x0, #0xb78
  400924:	97ffff0b 	bl	400550 <atof@plt>
  400928:	90000000 	adrp	x0, 400000 <_init-0x500>
  40092c:	91312000 	add	x0, x0, #0xc48
  400930:	97ffff18 	bl	400590 <printf@plt>
  400934:	90000000 	adrp	x0, 400000 <_init-0x500>
  400938:	912e6000 	add	x0, x0, #0xb98
  40093c:	97ffff05 	bl	400550 <atof@plt>
  400940:	90000000 	adrp	x0, 400000 <_init-0x500>
  400944:	91312000 	add	x0, x0, #0xc48
  400948:	97ffff12 	bl	400590 <printf@plt>
  40094c:	90000000 	adrp	x0, 400000 <_init-0x500>
  400950:	912ea000 	add	x0, x0, #0xba8
  400954:	97fffeff 	bl	400550 <atof@plt>
  400958:	90000000 	adrp	x0, 400000 <_init-0x500>
  40095c:	91312000 	add	x0, x0, #0xc48
  400960:	97ffff0c 	bl	400590 <printf@plt>
  400964:	90000000 	adrp	x0, 400000 <_init-0x500>
  400968:	912ee000 	add	x0, x0, #0xbb8
  40096c:	97fffef9 	bl	400550 <atof@plt>
  400970:	90000000 	adrp	x0, 400000 <_init-0x500>
  400974:	91312000 	add	x0, x0, #0xc48
  400978:	97ffff06 	bl	400590 <printf@plt>
  40097c:	90000000 	adrp	x0, 400000 <_init-0x500>
  400980:	912f2000 	add	x0, x0, #0xbc8
  400984:	97fffef3 	bl	400550 <atof@plt>
  400988:	90000000 	adrp	x0, 400000 <_init-0x500>
  40098c:	91312000 	add	x0, x0, #0xc48
  400990:	97ffff00 	bl	400590 <printf@plt>
  400994:	90000000 	adrp	x0, 400000 <_init-0x500>
  400998:	912f6000 	add	x0, x0, #0xbd8
  40099c:	97fffeed 	bl	400550 <atof@plt>
  4009a0:	90000000 	adrp	x0, 400000 <_init-0x500>
  4009a4:	91312000 	add	x0, x0, #0xc48
  4009a8:	97fffefa 	bl	400590 <printf@plt>
  4009ac:	90000000 	adrp	x0, 400000 <_init-0x500>
  4009b0:	912fa000 	add	x0, x0, #0xbe8
  4009b4:	97fffee7 	bl	400550 <atof@plt>
  4009b8:	90000000 	adrp	x0, 400000 <_init-0x500>
  4009bc:	91312000 	add	x0, x0, #0xc48
  4009c0:	97fffef4 	bl	400590 <printf@plt>
  4009c4:	90000000 	adrp	x0, 400000 <_init-0x500>
  4009c8:	912fe000 	add	x0, x0, #0xbf8
  4009cc:	97fffee1 	bl	400550 <atof@plt>
  4009d0:	90000000 	adrp	x0, 400000 <_init-0x500>
  4009d4:	91312000 	add	x0, x0, #0xc48
  4009d8:	97fffeee 	bl	400590 <printf@plt>
  4009dc:	90000000 	adrp	x0, 400000 <_init-0x500>
  4009e0:	91302000 	add	x0, x0, #0xc08
  4009e4:	97fffedb 	bl	400550 <atof@plt>
  4009e8:	90000000 	adrp	x0, 400000 <_init-0x500>
  4009ec:	91312000 	add	x0, x0, #0xc48
  4009f0:	97fffee8 	bl	400590 <printf@plt>
  4009f4:	90000000 	adrp	x0, 400000 <_init-0x500>
  4009f8:	91306000 	add	x0, x0, #0xc18
  4009fc:	97fffed5 	bl	400550 <atof@plt>
  400a00:	90000000 	adrp	x0, 400000 <_init-0x500>
  400a04:	91312000 	add	x0, x0, #0xc48
  400a08:	97fffee2 	bl	400590 <printf@plt>
  400a0c:	90000000 	adrp	x0, 400000 <_init-0x500>
  400a10:	9130a000 	add	x0, x0, #0xc28
  400a14:	97fffecf 	bl	400550 <atof@plt>
  400a18:	90000000 	adrp	x0, 400000 <_init-0x500>
  400a1c:	91312000 	add	x0, x0, #0xc48
  400a20:	97fffedc 	bl	400590 <printf@plt>
  400a24:	90000000 	adrp	x0, 400000 <_init-0x500>
  400a28:	9130e000 	add	x0, x0, #0xc38
  400a2c:	97fffec9 	bl	400550 <atof@plt>
  400a30:	90000000 	adrp	x0, 400000 <_init-0x500>
  400a34:	91312000 	add	x0, x0, #0xc48
  400a38:	97fffed6 	bl	400590 <printf@plt>
  400a3c:	d503201f 	nop
  400a40:	a8cb7bfd 	ldp	x29, x30, [sp], #176
  400a44:	d65f03c0 	ret

0000000000400a48 <__libc_csu_init>:
  400a48:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400a4c:	910003fd 	mov	x29, sp
  400a50:	a901d7f4 	stp	x20, x21, [sp, #24]
  400a54:	90000094 	adrp	x20, 410000 <__FRAME_END__+0xf330>
  400a58:	90000095 	adrp	x21, 410000 <__FRAME_END__+0xf330>
  400a5c:	91374294 	add	x20, x20, #0xdd0
  400a60:	913722b5 	add	x21, x21, #0xdc8
  400a64:	a902dff6 	stp	x22, x23, [sp, #40]
  400a68:	cb150294 	sub	x20, x20, x21
  400a6c:	f9001ff8 	str	x24, [sp, #56]
  400a70:	2a0003f6 	mov	w22, w0
  400a74:	aa0103f7 	mov	x23, x1
  400a78:	9343fe94 	asr	x20, x20, #3
  400a7c:	aa0203f8 	mov	x24, x2
  400a80:	97fffea0 	bl	400500 <_init>
  400a84:	b4000194 	cbz	x20, 400ab4 <__libc_csu_init+0x6c>
  400a88:	f9000bb3 	str	x19, [x29, #16]
  400a8c:	d2800013 	mov	x19, #0x0                   	// #0
  400a90:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  400a94:	aa1803e2 	mov	x2, x24
  400a98:	aa1703e1 	mov	x1, x23
  400a9c:	2a1603e0 	mov	w0, w22
  400aa0:	91000673 	add	x19, x19, #0x1
  400aa4:	d63f0060 	blr	x3
  400aa8:	eb13029f 	cmp	x20, x19
  400aac:	54ffff21 	b.ne	400a90 <__libc_csu_init+0x48>  // b.any
  400ab0:	f9400bb3 	ldr	x19, [x29, #16]
  400ab4:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400ab8:	a942dff6 	ldp	x22, x23, [sp, #40]
  400abc:	f9401ff8 	ldr	x24, [sp, #56]
  400ac0:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400ac4:	d65f03c0 	ret

0000000000400ac8 <__libc_csu_fini>:
  400ac8:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400acc <_fini>:
  400acc:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400ad0:	910003fd 	mov	x29, sp
  400ad4:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400ad8:	d65f03c0 	ret
